In the semiconductor industry, the minimum feature sizes of microelectronic devices are approaching the deep sub-micron regime to meet the demand for faster, lower power microprocessors and digital circuits. Low resistivity refractory metal silicide layers, for instance, are widely used as part of the gate stack in dynamic random access memory (DRAM) and enhanced DRAM (EDRAM) manufacturing. Another application for low resistivity metal silicide layers is in the capacitor of deep trench-DRAM or in vias of stacked DRAM cells. Both applications suffer from the fact that the serial resistance of the inner electrode (plug, deep trench-DRAM) or vias (stacked DRAM) increases with the square of the inverse ground rule. This effect is further enhanced since the requirement of constant capacitance leads to deeper trenches (or higher stacks, respectively) in advanced DRAMs.
A key requirement for deep trench-DRAM is good step coverage of metal silicide films and layers in trenches with high aspect ratios. Additional requirements include that the metal silicide films must have low electrical resistivity and must be stable at conventional processing temperatures used in manufacturing integrated circuits. Conformal deposition of these films is usually required and this is very challenging for very deep trenches.